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Achronix Speedster22i User Macro Guide Manual de usuario Pagina 141

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Memories BRAM80KFIFO
Speedster22i Macro Cell Library
AchronixSemiconductorProprietary PAGE 124
Table 6-21: Valid Read Width Versus Write Width Combinations per port for n x 5 width modes
Port Read
Width
Port Write Width
2kx40 4kx20 8kx10 16kx5 Other
40
20
10
5
Table 6-22: Valid Read Width Versus Write Width Combinations p
er port for n x 9 width modes
Port Read
Width
Port Write Width
2kx36 4kx18 8kx9 Other
36
18
9
Table 6-23: Valid Read Width Versus Write Width C
ombinations per port for 2
n
width modes
Port Read
Width
Port Write Width
2kx32 4kx16 8kx8 16kx4 32kx2 64kx1 Other
32
16
8
4
2
1
fwft
The fwft parameter defines if the FIFO is in the First‐Word‐Fall_Through mode.When the
fwft parameter is set to 1’b1, the first value written into the FIFO appears at the dout (and
doutp,doutxpifapplicable)outputwithout havingtoperformareadoperation.Ifthefwft
parmaeter is set to 1’b0
, the first data word written into the FIFO is available at the FIFO
outputonerdclk clock cycle after thefirstreadoperation.Thisparameter only effectsthe
availabilityofthefirstwordwrittenintotheFIFOafteranempty condition.Operationofthe
twomodesisthesa
meafterthefirstreadoperationisperformed.Thedefaultvalueofthefwft
parmeteris1’b0.Notethatthe fwftparametermayonly besetto1’b1 whenthesync_mode
parameterissetto1’b0.
en_out_reg
The en_out_reg parameter enables the register at the output of the FIFO. A value of 1’b0
disablestheoutputregister.Whentheoutput registerisenabledbysettingtheen_out _regto
1’b1,thereisanadditionalcycleoflatencyforeachreadoperation.Theen_out_regparameter
isonlysettoitsnon‐de
faultvaluewhentheFIFOisinsingleclockmode(sync_mode=1’b1).
When the FIFO is in dual clock mode, the en_out_reg parameter must be set to 1’b1. The
defaultvalueoftheen_out_regparameteris1’b1.
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