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Achronix Speedster22i User Macro Guide Manual de usuario Pagina 196

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Multipliers BMACC56
Speedster22i Macro Cell Library
AchronixSemiconductorProprietary PAGE 179
sel_cin
The sel_cin parameter defines what is routed to the cin input of the add/sub block. The cin
input may be sel ected from the registered or non‐registered cin input, or forcing it to a
constnatvalueof0or1.Thesel_cinparameterdefaultstothevalue2’b00.
Table 7-4: Add/Sub Block Carry Input Assignment
sel_cin Add/Sub Block Cin Assignment
2’b00 Select the cin input to drive the add/sub cin input.
2’b01 Select the output of the
Carry In Input Register to drive the add/sub cin input.
2’b10 Select 1’b0 to drive the add/sub cin input.
2’b11 Select 1’b1 to drive the add/sub cin input.
sel_sub
Thesel_subparameterdefineswhatisroutedtothesubinpu toftheadd/subblock.Thesub
inputmaybeselectedfromtheregisteredornon‐registeredsubinput,orforceittoaconstant
valueof0or1.Thesel_subparameterdefaultstothevalue2’b00.
Table 7-5: Add/Sub Block Sub Input Assignment
sel_sub Add/Sub Block Cin Assignment
2’b00 Select the sub input to drive the add/sub sub input.
2’b01 Select the output of
the Sub Input Register to drive the add/sub sub input.
2’b10 Select 1’b0 to drive the add/sub sub input.
2’b11 Select 1’b1 to drive the add/sub sub input.
mult_bypass
The mult_bypass parameter determines whether the 28x28 mu ltiplier is used or bypassed.
Settingmult_b ypassto1’b0enablesthemultiplierwhilesettingmult_bypassto1’b1bypasses
the multiplier and routes the concatenated a[27:0],b[27:0] data the the multout[55:0] output.
Themult_bypassparameterdefaultstothevalueof1’b0.
clock_edge
Theclock_edgeparameter defineswhich edgeofthe Clock inputisused by allofthe input
and output registers. Setting clock_edge to 1’b0 selects the rising edge of the clock as the
activeedgewhilesettingclock_edgeto1’b1selectsthefallingedgeoftheclockastheactive
edge.Theclock_edgeparameterdef
aultstothevalue1’b0.
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